Vivado

GPTKB entity

Statements (55)
Predicate Object
gptkbp:instanceOf electronic design automation
gptkbp:developedBy gptkb:Xilinx
gptkbp:firstReleased 2012
gptkbp:hasFeature gptkb:graphical_user_interface
Project management
Debugging tools
Bitstream generation
Power analysis
Partial reconfiguration
Floorplanning
Constraint management
IP catalog
Timing closure
Block design automation
Cross-probing
Design analysis
Design checkpoints
Design rule checks
Hardware co-simulation
IP packaging
Schematic viewer
Waveform viewer
https://www.w3.org/2000/01/rdf-schema#label Vivado
gptkbp:latestReleaseVersion 2023.1
gptkbp:license Proprietary
gptkbp:operatingSystem gptkb:Windows
gptkb:Linux
gptkbp:platform gptkb:Xilinx_7-series_FPGAs
gptkb:Xilinx_UltraScale+_FPGAs
gptkb:Xilinx_UltraScale_FPGAs
gptkbp:programmingLanguage gptkb:Tcl
gptkb:C++
gptkbp:replacedBy gptkb:ISE_Design_Suite
gptkbp:supportsLanguage gptkb:Tcl
gptkb:VHDL
gptkb:Verilog
gptkb:C++
gptkb:SystemVerilog
C
gptkbp:usedFor gptkb:simulation
SoC design
FPGA design
High-level synthesis
IP integration
Timing analysis
Hardware description language synthesis
gptkbp:uses gptkb:Vivado_HLS
gptkb:Vivado_IP_Integrator
gptkb:Vivado_Simulator
gptkb:Vivado_Implementation
gptkb:Vivado_Synthesis
gptkbp:website https://www.xilinx.com/products/design-tools/vivado.html
gptkbp:bfsParent gptkb:ModelSim
gptkb:VHSIC_Hardware_Description_Language
gptkbp:bfsLayer 6