Statements (49)
| Predicate | Object |
|---|---|
| gptkbp:instance_of |
gptkb:software
|
| gptkbp:bfsLayer |
5
|
| gptkbp:bfsParent |
gptkb:Xilinx_Zynq
|
| gptkbp:developed_by |
gptkb:Xilinx
|
| gptkbp:has_documentation |
gptkb:municipality
Release Notes |
| gptkbp:has_feature |
Debugging tools
Power Analysis Timing Analysis Device Programming Design Analysis |
| gptkbp:has_version |
2020.2
2023.1 2022.2 2019.2 2021.2 |
| https://www.w3.org/2000/01/rdf-schema#label |
Vivado
|
| gptkbp:includes |
High-Level Synthesis (HLS)
IP Integrator |
| gptkbp:is_available_on |
Online marketplaces
Third-party distributors Xilinx website |
| gptkbp:is_compatible_with |
gptkb:smartphone
gptkb:operating_system |
| gptkbp:is_part_of |
Xilinx Design Suite
|
| gptkbp:is_used_for |
FPGA design
|
| gptkbp:is_used_in |
gptkb:Telecommunications_company
Consumer electronics Digital signal processing Embedded systems Industrial automation Automotive applications Aerospace applications Machine learning applications Computer vision applications |
| gptkbp:provides |
Simulation tools
Command Line Interface (CLI) Synthesis tools GUI interface Implementation tools |
| gptkbp:released_in |
gptkb:2012
|
| gptkbp:supports |
gptkb:System_Verilog
gptkb:Xilinx_devices gptkb:Ultra_Scale_architecture VHDL Verilog Tcl scripting Ultra Scale+ architecture Zynq So Cs |