Vivado Design Suite

GPTKB entity

Statements (65)
Predicate Object
gptkbp:instance_of gptkb:software
gptkbp:bfsLayer 6
gptkbp:bfsParent gptkb:Versal_ACAP
gptkb:Xilinx_FPGA_Products
gptkb:Zynq_Ultra_Scale+
gptkbp:developed_by gptkb:Xilinx
gptkbp:has gptkb:document
Graphical User Interface (GUI)
https://www.w3.org/2000/01/rdf-schema#label Vivado Design Suite
gptkbp:includes High-Level Synthesis (HLS)
IP Integrator
gptkbp:is_available_in Standard Edition
Free Edition
Premium Edition
gptkbp:is_available_on gptkb:operating_system
gptkbp:is_compatible_with Kintex FPG As
Virtex FPG As
Xilinx FPG As
Artix FPG As
Zynq So Cs
gptkbp:is_integrated_with Xilinx SDK
gptkbp:is_known_for Flexibility
Scalability
High Performance
Ease of Use
gptkbp:is_part_of FPGA Design Flow
FPGA Development Flow
Xilinx Design Tools
Xilinx Vivado Ecosystem
gptkbp:is_supported_by Xilinx Community
Xilinx Documentation
Xilinx Forums
Xilinx Training
gptkbp:is_used_by gptkb:architect
gptkbp:is_used_for gptkb:aircraft
gptkb:software_framework
Control Systems
Image Processing
Signal Processing
Digital Circuit Design
FPGA design
gptkbp:is_used_in gptkb:film_production_company
Academia
gptkbp:provides gptkb:municipality
Debugging tools
User Guides
Simulation tools
Synthesis tools
Device Programming
Design Analysis Tools
Implementation tools
gptkbp:release_date gptkb:2012
gptkbp:supports gptkb:System_Verilog
VHDL
Verilog
Design Optimization
Power Analysis
Timing Analysis
Design Verification
High-Level Design
Tcl scripting
Design Constraints
Embedded Design
Partial Reconfiguration
RTL Design