von Neumann architecture

E14971

computer architecture stored-program architecture

The von Neumann architecture is a foundational computer design model in which a single memory stores both program instructions and data, executed sequentially by a central processing unit.

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All labels observed (3)

Label	Occurrences
von Neumann architecture canonical	10
von Neumann bottleneck	2
von Neumann machine	1

How this entity was disambiguated

This entity first appeared as the object of triple T131616 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.

NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07

Target entity: von Neumann architecture
Context triple: [John von Neumann, knownFor, von Neumann architecture]

A. Turing machine
A Turing machine is an abstract computational model that manipulates symbols on an infinite tape according to a set of rules, providing a formal foundation for the concept of algorithm and computability.
B. IBM System/360
IBM System/360 is a landmark family of mainframe computers introduced in the 1960s that standardized computer architecture and revolutionized business and scientific computing.
C. ALGOL 60
ALGOL 60 is an early high-level programming language that pioneered block structure and lexical scoping, profoundly influencing the design of many later languages.
D. Honeywell DDP-516 minicomputer
The Honeywell DDP-516 minicomputer was a rugged, 16-bit computer from the 1960s widely used in real-time and military applications, notably serving as the hardware platform for the original ARPANET Interface Message Processors.
E. Differential analyzer
The Differential Analyzer is an early analog mechanical computer designed to solve differential equations using interconnected rotating shafts and wheels.
F. None of above. chosen
G. Unsure - the case is ambiguous/there is not enough information to decide.

NED2 Entity disambiguation (via description) gpt-5-mini-2025-08-07

Target entity: von Neumann architecture
Target entity description: The von Neumann architecture is a foundational computer design model in which a single memory stores both program instructions and data, executed sequentially by a central processing unit.

A. Turing machine
A Turing machine is an abstract computational model that manipulates symbols on an infinite tape according to a set of rules, providing a formal foundation for the concept of algorithm and computability.
B. IBM System/360
IBM System/360 is a landmark family of mainframe computers introduced in the 1960s that standardized computer architecture and revolutionized business and scientific computing.
C. ALGOL 60
ALGOL 60 is an early high-level programming language that pioneered block structure and lexical scoping, profoundly influencing the design of many later languages.
D. Honeywell DDP-516 minicomputer
The Honeywell DDP-516 minicomputer was a rugged, 16-bit computer from the 1960s widely used in real-time and military applications, notably serving as the hardware platform for the original ARPANET Interface Message Processors.
E. Differential analyzer
The Differential Analyzer is an early analog mechanical computer designed to solve differential equations using interconnected rotating shafts and wheels.
F. None of above. chosen

Statements (47)

Predicate	Object
instanceOf	computer architecture ⓘ stored-program architecture ⓘ
appliedIn	EDVAC ⓘ IAS machine ⓘ most personal computers ⓘ most servers ⓘ most workstations ⓘ
characterizedBy	sequential processing ⓘ shared bus for data and instructions ⓘ stored-program concept ⓘ von Neumann architecture self-linksurface differs ⓘ surface form: von Neumann bottleneck
contrastedWith	Harvard architecture ⓘ
dateProposed	1945 ⓘ
documentedIn	First Draft of a Report on the EDVAC ⓘ
enables	programs as data ⓘ self-modifying code ⓘ
hasComponent	arithmetic logic unit ⓘ central processing unit ⓘ control unit ⓘ input unit ⓘ memory ⓘ output unit ⓘ
hasGoal	flexible general-purpose computation ⓘ
hasInfluenceOn	CPU design ⓘ computer organization textbooks ⓘ memory hierarchy design ⓘ programming language implementation ⓘ
hasLimitation	instruction and data contention on same bus ⓘ memory bandwidth bottleneck ⓘ
implementedBy	general-purpose CPUs ⓘ microprocessors ⓘ
influenced	early electronic computers ⓘ modern general-purpose computers ⓘ
namedAfter	John von Neumann ⓘ
relatedTo	control flow ⓘ instruction set architecture ⓘ stored-program computer ⓘ
stores	data in memory ⓘ program instructions in memory ⓘ
supports	imperative programming languages ⓘ sequential programming model ⓘ
uses	binary representation of data ⓘ fetch-decode-execute cycle ⓘ program counter ⓘ sequential instruction execution ⓘ single address space for code and data ⓘ single shared memory for instructions and data ⓘ

How these facts were elicited

Referenced by (13)

Full triples — surface form annotated when it differs from this entity's canonical label.

John von Neumann → knownFor → von Neumann architecture ⓘ

von Neumann architecture → characterizedBy → von Neumann architecture self-linksurface differs ⓘ

this entity surface form: von Neumann bottleneck

First Draft of a Report on the EDVAC → influenced → von Neumann architecture ⓘ

IAS machine → architecture → von Neumann architecture ⓘ

EDVAC → influenced → von Neumann architecture ⓘ

von Neumann probe → relatedTo → von Neumann architecture ⓘ

this entity surface form: von Neumann machine

Neumann → knownFor → von Neumann architecture ⓘ

subject surface form: John von Neumann

Princeton architecture → alternativeName → von Neumann architecture ⓘ

Princeton architecture → limitation → von Neumann architecture ⓘ

this entity surface form: von Neumann bottleneck

ILLIAC I → architecture → von Neumann architecture ⓘ

SILLIAC → architecture → von Neumann architecture ⓘ

JOHNNIAC → architectureBasedOn → von Neumann architecture ⓘ

AVIDAC → architectureType → von Neumann architecture ⓘ

All labels observed (3)

How this entity was disambiguated Show

Statements (47)

How these facts were elicited Show

Referenced by (13)

How this entity was disambiguated

How these facts were elicited