|
gptkbp:instanceOf
|
computer architecture project
|
|
gptkbp:developedBy
|
gptkb:University_of_California,_Berkeley
|
|
gptkbp:field
|
gptkb:architecture
|
|
gptkbp:focus
|
gptkb:reduced_instruction_set_computing
|
|
https://www.w3.org/2000/01/rdf-schema#label
|
Berkeley RISC
|
|
gptkbp:influenced
|
gptkb:SPARC
gptkb:ARM_architecture
MIPS architecture
|
|
gptkbp:location
|
gptkb:Berkeley,_California
|
|
gptkbp:notableAlumni
|
gptkb:David_Patterson
gptkb:John_L._Hennessy
gptkb:Carlo_H._Séquin
|
|
gptkbp:notableContributor
|
gptkb:RISC_II_processor
gptkb:RISC_I_processor
RISC concept popularization
|
|
gptkbp:notablePublication
|
gptkb:A_Case_for_the_Reduced_Instruction_Set_Computer_(RISC)
|
|
gptkbp:principalInvestigator
|
gptkb:David_Patterson
|
|
gptkbp:relatedTo
|
gptkb:IBM_801
gptkb:Stanford_MIPS
|
|
gptkbp:sponsor
|
gptkb:Defense_Advanced_Research_Projects_Agency_(DARPA)
|
|
gptkbp:startDate
|
1980
|
|
gptkbp:bfsParent
|
gptkb:Scalable_Processor_Architecture
gptkb:SPARC_architecture
gptkb:Microprocessor_without_Interlocked_Pipeline_Stages
gptkb:MIPS_instruction_set_architecture
|
|
gptkbp:bfsLayer
|
6
|