|
gptkbp:instanceOf
|
gptkb:microprocessor
|
|
gptkbp:constructionStartYear
|
1981
|
|
gptkbp:developedBy
|
gptkb:Stanford_University
|
|
gptkbp:developmentEndYear
|
1984
|
|
gptkbp:firstPublished
|
1981
|
|
gptkbp:influenced
|
gptkb:RISC_architectures
MIPS architecture
|
|
gptkbp:influencedBy
|
gptkb:Berkeley_RISC
gptkb:IBM_801
|
|
gptkbp:location
|
gptkb:Stanford,_California
|
|
gptkbp:notableFor
|
load/store architecture
pioneering RISC design
simple pipeline design
|
|
gptkbp:notableProject
|
gptkb:John_L._Hennessy
|
|
gptkbp:notablePublication
|
gptkb:A_New_MIPS:_Microprocessor_without_Interlocked_Pipeline_Stages_(1981)
|
|
gptkbp:standsFor
|
gptkb:Microprocessor_without_Interlocked_Pipeline_Stages
|
|
gptkbp:successor
|
gptkb:MIPS_R2000
|
|
gptkbp:type
|
gptkb:RISC
|
|
gptkbp:usedIn
|
gptkb:research
education
|
|
gptkbp:bfsParent
|
gptkb:Berkeley_RISC
gptkb:Reduced_Instruction_Set_Computing_(RISC)
|
|
gptkbp:bfsLayer
|
7
|
|
https://www.w3.org/2000/01/rdf-schema#label
|
Stanford MIPS
|