Statements (20)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:microprocessor
|
| gptkbp:architecture |
gptkb:RISC
|
| gptkbp:designedBy |
gptkb:David_Patterson
gptkb:Carlo_H._Séquin |
| gptkbp:developedBy |
gptkb:University_of_California,_Berkeley
|
| gptkbp:fabricationProcess |
5-micron NMOS
|
| gptkbp:firstReleased |
1982
|
| gptkbp:influenced |
gptkb:SPARC
gptkb:RISC-V MIPS architecture |
| gptkbp:length |
32-bit
|
| gptkbp:notableFor |
pioneering RISC architecture
|
| gptkbp:notableProject |
gptkb:Berkeley_RISC_project
|
| gptkbp:numberOfInstructions |
31
|
| gptkbp:registration |
32 general-purpose registers
|
| gptkbp:speed |
1 MHz
|
| gptkbp:transistorCount |
44,420
|
| gptkbp:bfsParent |
gptkb:Berkeley_RISC
|
| gptkbp:bfsLayer |
7
|
| https://www.w3.org/2000/01/rdf-schema#label |
RISC I processor
|