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gptkbp:instanceOf
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gptkb:software
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gptkbp:category
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gptkb:software
gptkb:simulation
hardware design
electronic design automation
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gptkbp:compatibleWith
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gptkb:VHDL
event-driven simulation
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gptkbp:describes
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Verilator is an open-source tool for converting Verilog and SystemVerilog hardware designs into cycle-accurate C++ or SystemC models.
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gptkbp:developer
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Wilson Snyder
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gptkbp:feature
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linting
multi-threading
tracing
fast simulation
coverage analysis
SystemC integration
assertion support
cycle-accurate simulation
open-source licensing
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gptkbp:firstReleased
|
2003
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gptkbp:format
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gptkb:SystemC
gptkb:C++
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|
https://www.w3.org/2000/01/rdf-schema#label
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Verilator
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gptkbp:latestReleaseVersion
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2024-05-19
5.020
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gptkbp:license
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gptkb:GPL
gptkb:LGPL
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gptkbp:notableUser
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gptkb:Google
gptkb:Western_Digital
gptkb:Intel
gptkb:Siemens
RISC-V community
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gptkbp:platform
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gptkb:Windows
gptkb:macOS
gptkb:Linux
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gptkbp:programmingLanguage
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gptkb:Perl
gptkb:Verilog
gptkb:C++
gptkb:SystemVerilog
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gptkbp:relatedTo
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gptkb:GHDL
gptkb:SystemC
gptkb:Icarus_Verilog
gptkb:ModelSim
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gptkbp:repository
|
https://github.com/verilator/verilator
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gptkbp:supports
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gptkb:Verilog
gptkb:SystemVerilog
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gptkbp:usedFor
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hardware verification
linting
hardware simulation
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gptkbp:website
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https://www.veripool.org/verilator/
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gptkbp:bfsParent
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gptkb:Cocotb
gptkb:FuseSoC
gptkb:RISC-V_ecosystem
gptkb:Verilog_hardware_description_language
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gptkbp:bfsLayer
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7
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