Statements (49)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
hardware verification language feature
|
| gptkbp:abbreviation |
gptkb:SVA
|
| gptkbp:benefit |
automation of verification
documentation of design intent early bug detection improved design quality |
| gptkbp:canBe |
emulators
simulators formal tools |
| gptkbp:enables |
bug detection
coverage analysis property specification protocol checking temporal logic checking |
| gptkbp:hasKeyword |
cover
restrict assert assume |
| gptkbp:hasSyntax |
assert property
assume property cover property property ... endproperty restrict property sequence ... endsequence |
| gptkbp:hasType |
concurrent assertion
immediate assertion |
| https://www.w3.org/2000/01/rdf-schema#label |
SystemVerilog Assertions
|
| gptkbp:introducedIn |
SystemVerilog 2005
|
| gptkbp:limitation |
can increase simulation time
complexity for beginners limited support in some tools requires careful specification |
| gptkbp:partOf |
gptkb:SystemVerilog
|
| gptkbp:relatedTo |
gptkb:PSL
gptkb:UVM OVM Verilog Assertions |
| gptkbp:standardizedBy |
gptkb:IEEE_1800
|
| gptkbp:supportedBy |
gptkb:Cadence_Incisive
gptkb:Synopsys_VCS Aldec Riviera-PRO Mentor Questa |
| gptkbp:usedFor |
formal verification
simulation-based verification |
| gptkbp:usedIn |
hardware design
ASIC verification FPGA verification |
| gptkbp:bfsParent |
gptkb:JasperGold
|
| gptkbp:bfsLayer |
6
|