Statements (21)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:microprocessor
|
| gptkbp:architecture |
gptkb:RISC-V
|
| gptkbp:category |
microprocessor cores
|
| gptkbp:designedFor |
embedded systems
|
| gptkbp:developedBy |
gptkb:Western_Digital
|
| gptkbp:firstReleased |
2019
|
| gptkbp:github |
https://github.com/chipsalliance/Cores-SweRV
|
| gptkbp:heldBy |
gptkb:RV32IMC
|
| gptkbp:license |
gptkb:Apache_License_2.0
|
| gptkbp:notableMember |
SweRV EH1
SweRV EH2 SweRV EL2 |
| gptkbp:openSource |
true
|
| gptkbp:supports |
Chips Alliance
|
| gptkbp:usedIn |
storage controllers
SSD controllers |
| gptkbp:width |
32
|
| gptkbp:bfsParent |
gptkb:SweRV_Core_EH2
gptkb:SweRV_Core_EL2 |
| gptkbp:bfsLayer |
8
|
| https://www.w3.org/2000/01/rdf-schema#label |
SweRV Core family
|