Microprocessor without Interlocked Pipeline Stages
GPTKB entity
Statements (32)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:microprocessor
|
| gptkbp:abbreviation |
gptkb:MIPS
|
| gptkbp:category |
gptkb:RISC
gptkb:Computer_architecture Instruction set architectures |
| gptkbp:designedBy |
gptkb:John_L._Hennessy
|
| gptkbp:endianSupport |
big-endian
little-endian |
| gptkbp:hasCompany |
gptkb:MIPS_Computer_Systems
gptkb:Imagination_Technologies gptkb:Wave_Computing |
| gptkbp:influenced |
gptkb:ARM_architecture
gptkb:SPARC_architecture gptkb:PowerPC_architecture |
| gptkbp:influencedBy |
gptkb:Berkeley_RISC
|
| gptkbp:instructionLength |
32 bits
|
| gptkbp:introducedIn |
1981
|
| gptkbp:notableFor |
gptkb:MIPS_R10000
gptkb:MIPS_R4000 gptkb:MIPS_R2000 gptkb:MIPS_R3000 |
| gptkbp:registration |
32 general-purpose registers
|
| gptkbp:standardizedBy |
Yes
|
| gptkbp:type |
gptkb:RISC
|
| gptkbp:usedIn |
embedded systems
routers servers workstations game consoles |
| gptkbp:bfsParent |
gptkb:MIPS
|
| gptkbp:bfsLayer |
6
|
| https://www.w3.org/2000/01/rdf-schema#label |
Microprocessor without Interlocked Pipeline Stages
|