|
gptkbp:instanceOf
|
semiconductor process node
|
|
gptkbp:developedBy
|
gptkb:TSMC
|
|
gptkbp:DUVOnly
|
N7, N7P
|
|
gptkbp:EUVEnabled
|
N7+
|
|
gptkbp:EUVLayers
|
up to 4 (N7+)
|
|
gptkbp:EUVSupport
|
optional
|
|
gptkbp:finFET
|
yes
|
|
gptkbp:firstProduced
|
2018
|
|
gptkbp:headquartersLocation
|
Hsinchu, Taiwan (TSMC)
|
|
https://www.w3.org/2000/01/rdf-schema#label
|
N7 (TSMC 7nm)
|
|
gptkbp:lithography
|
DUV
|
|
gptkbp:marketedAs
|
N7
7nm
|
|
gptkbp:massProductionStart
|
Q2 2018
|
|
gptkbp:notableClient
|
gptkb:Apple
gptkb:AMD
gptkb:Qualcomm
gptkb:HiSilicon
|
|
gptkbp:notableFeature
|
energy efficiency improvements over 10nm
first TSMC process to use EUV (N7+)
high transistor density
performance improvements over 10nm
|
|
gptkbp:notableProduct
|
gptkb:Apple_A12
gptkb:Apple_A13
gptkb:Qualcomm_Snapdragon_855
gptkb:AMD_Zen_3
gptkb:HiSilicon_Kirin_980
gptkb:AMD_Zen_2
|
|
gptkbp:predecessor
|
gptkb:TSMC_10nm
|
|
gptkbp:processVariants
|
N7 Pro
N7+ (EUV)
N7P
N7e
|
|
gptkbp:size
|
7nm
|
|
gptkbp:successor
|
gptkb:TSMC_5nm
|
|
gptkbp:technology
|
7nm
|
|
gptkbp:transistorDensity
|
~91.2 million/mm²
|
|
gptkbp:usedFor
|
CPUs
GPUs
mobile processors
logic chips
|
|
gptkbp:bfsParent
|
gptkb:N5_(TSMC_5nm)
|
|
gptkbp:bfsLayer
|
6
|