Statements (23)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:simulation
|
| gptkbp:category |
electronic design automation
|
| gptkbp:developedBy |
gptkb:Mentor_Graphics
|
| gptkbp:feature |
gptkb:graphical_user_interface
debugging tools command line interface waveform viewer mixed-language simulation testbench support |
| https://www.w3.org/2000/01/rdf-schema#label |
Mentor ModelSim
|
| gptkbp:license |
proprietary
|
| gptkbp:parentCompany |
gptkb:Siemens_EDA
|
| gptkbp:platform |
gptkb:Windows
gptkb:Linux |
| gptkbp:supportsLanguage |
gptkb:VHDL
gptkb:Verilog gptkb:SystemVerilog |
| gptkbp:usedFor |
HDL simulation
|
| gptkbp:usedIn |
ASIC design
FPGA design |
| gptkbp:website |
https://eda.sw.siemens.com/en-US/ic/model/
|
| gptkbp:bfsParent |
gptkb:Verilog_hardware_description_language
|
| gptkbp:bfsLayer |
7
|