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gptkbp:instanceOf
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electronic design automation
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|
gptkbp:category
|
EDA Software
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gptkbp:developedBy
|
gptkb:Cadence_Design_Systems
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|
gptkbp:features
|
gptkb:Design_Rule_Checking
Multi-threading
Routing
Clock Tree Synthesis
Floorplanning
Machine Learning Optimization
Power Optimization
Timing Closure
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gptkbp:format
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gptkb:Confederate_States_of_America
gptkb:Verilog
gptkb:SDF
gptkb:LEF
DEF
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|
https://www.w3.org/2000/01/rdf-schema#label
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Innovus
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gptkbp:integratesWith
|
gptkb:Genus_Synthesis_Solution
gptkb:Tempus_Timing_Signoff_Solution
gptkb:Voltus_IC_Power_Integrity_Solution
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gptkbp:latestReleaseVersion
|
as of 2024, Innovus 22.1
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gptkbp:platform
|
gptkb:Unix
gptkb:Linux
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gptkbp:predecessor
|
Encounter Digital Implementation System
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gptkbp:supports
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ASIC Design
Advanced Node Technologies
SoC Design
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gptkbp:usedFor
|
Physical Design
Place and Route
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|
gptkbp:usedIn
|
Integrated Circuit Design
|
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gptkbp:website
|
https://www.cadence.com/en_US/home/tools/digital-design-and-signoff/ic-physical-design/innovus-implementation-system.html
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gptkbp:bfsParent
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gptkb:Cadence
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|
gptkbp:bfsLayer
|
5
|