IEEE Standard for SystemVerilog—Unified Hardware Design, Specification, and Verification Language
GPTKB entity
Statements (21)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:International_Standard
|
| gptkbp:alsoKnownAs |
gptkb:IEEE_1800
|
| gptkbp:covers |
gptkb:hardware_specification
hardware verification hardware description |
| gptkbp:documentType |
gptkb:IEEE_1800
|
| gptkbp:firstPublished |
2005
|
| gptkbp:language |
English
|
| gptkbp:latestReleaseVersion |
gptkb:IEEE_1800-2017
|
| gptkbp:publishedBy |
gptkb:IEEE
|
| gptkbp:relatedTo |
gptkb:VHDL
gptkb:Verilog |
| gptkbp:specifies |
gptkb:SystemVerilog
|
| gptkbp:type |
gptkb:hardware_description_language
|
| gptkbp:usedFor |
digital circuit design
ASIC design FPGA design |
| gptkbp:bfsParent |
gptkb:IEEE_1800
gptkb:IEEE_1800-2017 |
| gptkbp:bfsLayer |
9
|
| https://www.w3.org/2000/01/rdf-schema#label |
IEEE Standard for SystemVerilog—Unified Hardware Design, Specification, and Verification Language
|