Statements (20)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:standard
|
| gptkbp:appliesTo |
gptkb:Verilog
|
| gptkbp:category |
gptkb:IEEE_standards
hardware description languages |
| gptkbp:field |
gptkb:hardware_description_language
gptkb:electronic_design_automation |
| gptkbp:firstPublished |
1995
|
| gptkbp:fullName |
gptkb:IEEE_Standard_for_Verilog_Hardware_Description_Language
|
| gptkbp:language |
English
|
| gptkbp:publishedBy |
gptkb:Institute_of_Electrical_and_Electronics_Engineers
|
| gptkbp:replacedBy |
gptkb:IEEE_1800
|
| gptkbp:status |
superseded
|
| gptkbp:updated |
2001
2005 |
| gptkbp:usedFor |
gptkb:simulation
digital circuit design synthesis |
| gptkbp:bfsParent |
gptkb:Verilog
|
| gptkbp:bfsLayer |
7
|
| https://www.w3.org/2000/01/rdf-schema#label |
IEEE 1364
|