|
gptkbp:instanceOf
|
gptkb:microprocessor
|
|
gptkbp:architecture
|
gptkb:ARMv7-M
|
|
gptkbp:cache
|
optional instruction and data TCM
|
|
gptkbp:compatibleWith
|
floating point unit
SIMD instructions
|
|
gptkbp:designedBy
|
gptkb:ARM_Holdings
|
|
gptkbp:endianSupport
|
big-endian
little-endian
|
|
gptkbp:family
|
gptkb:ARM_Cortex-M
|
|
gptkbp:frequency
|
up to 100 MHz
|
|
gptkbp:hasAddressBusWidth
|
32-bit
|
|
gptkbp:hasBusInterface
|
gptkb:AMBA_AHB-Lite
|
|
gptkbp:hasDebugFeatures
|
gptkb:CoreSight
|
|
gptkbp:hasDebugSupport
|
gptkb:JTAG
gptkb:Serial_Wire_Debug
|
|
gptkbp:hasHarvardArchitecture
|
yes
|
|
gptkbp:hasInterrupts
|
up to 240 external interrupts
|
|
gptkbp:hasMPU
|
optional
|
|
gptkbp:hasPipelineStages
|
3-stage pipeline
|
|
gptkbp:hasPowerManagement
|
yes
|
|
gptkbp:hasPriorityLevels
|
up to 256 priority levels
|
|
https://www.w3.org/2000/01/rdf-schema#label
|
Cortex M3
|
|
gptkbp:instructionSet
|
gptkb:ARMv7-M
gptkb:Thumb-2
|
|
gptkbp:intendedUse
|
embedded systems
|
|
gptkbp:introducedIn
|
2004
|
|
gptkbp:isLicensable
|
yes
|
|
gptkbp:marketedAs
|
gptkb:ARM_Ltd.
|
|
gptkbp:memoryBusWidth
|
32-bit
|
|
gptkbp:MMU
|
no
|
|
gptkbp:openSource
|
no
|
|
gptkbp:predecessor
|
gptkb:ARM7TDMI
|
|
gptkbp:successor
|
gptkb:Cortex_M4
|
|
gptkbp:supports
|
gptkb:Thumb-2_instruction_set
hardware divide
single-cycle multiply
low power operation
nested vectored interrupt controller
|
|
gptkbp:usedBy
|
gptkb:Texas_Instruments
gptkb:Atmel
gptkb:STMicroelectronics
gptkb:Silicon_Labs
gptkb:NXP_Semiconductors
|
|
gptkbp:usedIn
|
gptkb:consumer_electronics
IoT devices
microcontrollers
automotive applications
industrial control
|
|
gptkbp:width
|
32-bit
|
|
gptkbp:bfsParent
|
gptkb:Cortex_M33
|
|
gptkbp:bfsLayer
|
7
|