Statements (32)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:logic_synthesis_tool
|
| gptkbp:category |
gptkb:software
gptkb:electronic_design_automation Hardware design tools |
| gptkbp:commandLineTool |
true
|
| gptkbp:developer |
gptkb:Clifford_Wolf
|
| gptkbp:firstReleased |
2012
|
| gptkbp:license |
gptkb:ISC_License
|
| gptkbp:openSource |
true
|
| gptkbp:operatingSystem |
Cross-platform
|
| gptkbp:platform |
gptkb:ABC
gptkb:GHDL nextpnr |
| gptkbp:programmingLanguage |
gptkb:C++
C |
| gptkbp:relatedTo |
gptkb:GHDL
nextpnr SymbiFlow |
| gptkbp:repository |
https://github.com/YosysHQ/yosys
|
| gptkbp:supportsLanguage |
gptkb:Verilog
|
| gptkbp:target |
gptkb:Lattice_FPGAs
gptkb:Xilinx_FPGAs iCE40 FPGAs |
| gptkbp:usedFor |
ASIC design
FPGA design synthesis of digital circuits |
| gptkbp:website |
https://yosyshq.net/yosys/
|
| gptkbp:bfsParent |
gptkb:FuseSoC
gptkb:GHDL gptkb:iCE40 |
| gptkbp:bfsLayer |
8
|
| https://www.w3.org/2000/01/rdf-schema#label |
Yosys
|