Statements (27)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:electronic_design_automation
|
| gptkbp:category |
FPGA development tools
CPLD development tools |
| gptkbp:developer |
gptkb:Xilinx
|
| gptkbp:discontinued |
true
|
| gptkbp:firstReleased |
1996
|
| gptkbp:latestReleaseVersion |
14.7
2013 |
| gptkbp:license |
Proprietary
|
| gptkbp:mainFunction |
gptkb:simulation
Bitstream generation Place and route Synthesis and analysis of HDL designs |
| gptkbp:operatingSystem |
gptkb:Windows
gptkb:Linux |
| gptkbp:platform |
gptkb:FPGA
|
| gptkbp:replacedBy |
gptkb:Xilinx_Vivado
|
| gptkbp:supportsLanguage |
gptkb:VHDL
gptkb:Verilog ABEL |
| gptkbp:website |
https://www.xilinx.com/products/design-tools/ise-design-suite.html
|
| gptkbp:bfsParent |
gptkb:FuseSoC
gptkb:Xilinx_Vivado gptkb:CoolRunner-II gptkb:Xilinx_XC4000 |
| gptkbp:bfsLayer |
8
|
| https://www.w3.org/2000/01/rdf-schema#label |
Xilinx ISE
|