Statements (24)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:hardware_description_language
|
| gptkbp:basedOn |
gptkb:Verilog
|
| gptkbp:competitor |
gptkb:VHDL-AMS
|
| gptkbp:enables |
co-simulation of analog and digital circuits
|
| gptkbp:extendsTo |
gptkb:Verilog
|
| gptkbp:firstReleased |
2000
|
| gptkbp:hasFeature |
behavioral modeling
structural modeling continuous-time modeling discrete-event modeling |
| gptkbp:similarTo |
gptkb:Verilog
|
| gptkbp:standardizedBy |
gptkb:IEEE
|
| gptkbp:standardNumber |
gptkb:IEEE_1076.1
|
| gptkbp:supports |
analog modeling
mixed-signal modeling |
| gptkbp:usedBy |
semiconductor industry
|
| gptkbp:usedFor |
gptkb:electronic_design_automation
integrated circuit design |
| gptkbp:usedIn |
system-on-chip design
mixed-signal IC design |
| gptkbp:bfsParent |
gptkb:VHDL-AMS
gptkb:Verilog-A |
| gptkbp:bfsLayer |
8
|
| https://www.w3.org/2000/01/rdf-schema#label |
Verilog-AMS
|