Statements (23)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:microprocessor
|
| gptkbp:architecture |
gptkb:RISC-V
|
| gptkbp:cache |
optional instruction and data cache
|
| gptkbp:hasConcept |
32-bit
|
| gptkbp:heldBy |
gptkb:RISC-V
|
| https://www.w3.org/2000/01/rdf-schema#label |
SiFive E31
|
| gptkbp:intendedUse |
embedded systems
|
| gptkbp:manufacturer |
gptkb:SiFive
|
| gptkbp:marketedAs |
gptkb:E31_Coreplex
|
| gptkbp:openSource |
no
|
| gptkbp:pipelineStages |
4
|
| gptkbp:releaseYear |
2017
|
| gptkbp:supports |
gptkb:AMBA_AXI4_interface
gptkb:RV32IMAC_instruction_set hardware multiply/divide interrupts custom instructions atomic instructions machine, user, and supervisor privilege modes single-issue pipeline |
| gptkbp:usedIn |
gptkb:SiFive_FE310_microcontroller
|
| gptkbp:bfsParent |
gptkb:SiFive_processors
|
| gptkbp:bfsLayer |
6
|