Statements (22)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
processor core complex
|
| gptkbp:announced |
2017
|
| gptkbp:basedOn |
gptkb:RISC-V_architecture
|
| gptkbp:designedBy |
gptkb:SiFive
|
| gptkbp:hasConcept |
RV32IMAC
|
| gptkbp:hasFeature |
gptkb:interrupt_controller
hardware multiply/divide debug support local memory AXI/AHB bus interfaces |
| https://www.w3.org/2000/01/rdf-schema#label |
E31 Coreplex
|
| gptkbp:intendedUse |
IoT devices
embedded systems |
| gptkbp:marketedAs |
gptkb:SiFive
|
| gptkbp:pipelineStages |
4
|
| gptkbp:supports |
user mode
atomic instructions compressed instructions machine mode |
| gptkbp:width |
32
|
| gptkbp:bfsParent |
gptkb:SiFive_E31
|
| gptkbp:bfsLayer |
7
|