Statements (33)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
Electronic design automation process
|
| gptkbp:alternativeName |
RTL-to-GDS flow
RTL2GDS |
| gptkbp:domain |
VLSI design
Semiconductor industry |
| gptkbp:format |
gptkb:VHDL
gptkb:Verilog GDSII LEF/DEF |
| gptkbp:goal |
Create manufacturable IC layout
|
| https://www.w3.org/2000/01/rdf-schema#label |
RTL-to-GDSII flow
|
| gptkbp:input |
Register Transfer Level (RTL) code
|
| gptkbp:output |
GDSII layout file
|
| gptkbp:relatedTo |
Back-end design
Front-end design |
| gptkbp:step |
Routing
Placement Logic synthesis Floorplanning Clock tree synthesis Design rule checking Layout versus schematic (LVS) check Physical verification Static timing analysis |
| gptkbp:usedIn |
ASIC design
FPGA design |
| gptkbp:uses |
gptkb:Mentor_Graphics_Calibre
Cadence Genus Cadence Innovus Synopsys Design Compiler Synopsys IC Compiler |
| gptkbp:bfsParent |
gptkb:OpenROAD
|
| gptkbp:bfsLayer |
6
|