Statements (22)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:electronic_design_automation
|
| gptkbp:category |
gptkb:simulation
|
| gptkbp:developedBy |
gptkb:Siemens_EDA
|
| gptkbp:feature |
gptkb:graphical_user_interface
debugging code coverage mixed-language simulation assertion-based verification UVM support |
| gptkbp:formerName |
gptkb:ModelSim
|
| gptkbp:license |
proprietary
|
| gptkbp:parentCompany |
gptkb:Siemens
|
| gptkbp:platform |
gptkb:Windows
gptkb:Linux |
| gptkbp:supportsLanguage |
gptkb:VHDL
gptkb:Verilog gptkb:SystemVerilog |
| gptkbp:usedFor |
simulation of hardware description languages
|
| gptkbp:website |
https://eda.sw.siemens.com/en-US/ic/questa/
|
| gptkbp:bfsParent |
gptkb:ModelSim_DE
|
| gptkbp:bfsLayer |
8
|
| https://www.w3.org/2000/01/rdf-schema#label |
QuestaSim
|