Statements (19)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:microprocessor
|
| gptkbp:architecture |
POWER
|
| gptkbp:coreCount |
1
|
| gptkbp:introducedIn |
1996
|
| gptkbp:L2Cache |
32 KB instruction, 128 KB data
|
| gptkbp:manufacturer |
gptkb:IBM
|
| gptkbp:notableFor |
used in Deep Blue chess computer
first single-chip implementation of POWER2 |
| gptkbp:predecessor |
gptkb:POWER2
|
| gptkbp:speed |
120 MHz
|
| gptkbp:successor |
gptkb:POWER3
|
| gptkbp:technology |
0.29 μm CMOS
|
| gptkbp:transistorCount |
15 million
|
| gptkbp:type |
Multi-chip module
|
| gptkbp:usedIn |
gptkb:Deep_Blue
gptkb:IBM_RS/6000_SP |
| gptkbp:bfsParent |
gptkb:POWER2
|
| gptkbp:bfsLayer |
7
|
| https://www.w3.org/2000/01/rdf-schema#label |
POWER2 Super Chip (P2SC)
|