Statements (60)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
hardware description language
|
| gptkbp:abbreviation |
SV
|
| gptkbp:category |
gptkb:IEEE_standards
hardware description languages hardware verification languages |
| gptkbp:compatibleWith |
gptkb:VHDL
gptkb:SystemC gptkb:UVM OVM |
| gptkbp:domain |
electronic design automation
|
| gptkbp:extendsTo |
gptkb:Verilog
|
| gptkbp:firstPublished |
2005
|
| gptkbp:hasComponent |
classes
interfaces random variables semaphores mailboxes modules unions packages constraints assertions enums associative arrays dynamic arrays queues randomization structs automatic variables clocking blocks cover bins covergroups coverpoints cross coverage typedefs always blocks cover properties cover sequences final blocks initial blocks program blocks static variables |
| https://www.w3.org/2000/01/rdf-schema#label |
IEEE 1800 (SystemVerilog)
|
| gptkbp:includes |
interfaces
assertions randomization covergroups object-oriented programming features |
| gptkbp:language |
English
|
| gptkbp:latestReleaseVersion |
gptkb:IEEE_1800-2017
|
| gptkbp:predecessor |
gptkb:Verilog
|
| gptkbp:standardizedBy |
gptkb:IEEE
|
| gptkbp:successor |
gptkb:IEEE_1364_(Verilog)
|
| gptkbp:usedFor |
digital circuit design
hardware verification RTL design testbench development |
| gptkbp:website |
https://standards.ieee.org/standard/1800-2017.html
|
| gptkbp:bfsParent |
gptkb:IEEE_1364_(Verilog)
|
| gptkbp:bfsLayer |
7
|