Statements (20)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:standard
|
| gptkbp:appliesTo |
gptkb:Verilog
|
| gptkbp:category |
gptkb:hardware_description_language
|
| gptkbp:countryOfOrigin |
gptkb:United_States
|
| gptkbp:defines |
syntax and semantics of Verilog HDL
|
| gptkbp:documentType |
gptkb:International_Standard
|
| gptkbp:fullName |
gptkb:IEEE_Standard_for_Verilog_Hardware_Description_Language
|
| gptkbp:language |
English
|
| gptkbp:publicationYear |
2001
|
| gptkbp:publishedBy |
gptkb:Institute_of_Electrical_and_Electronics_Engineers
|
| gptkbp:relatedTo |
gptkb:electronic_design_automation
digital circuit design |
| gptkbp:replacedBy |
gptkb:IEEE_1364-1995
gptkb:IEEE_1364-2005 |
| gptkbp:scope |
digital design
|
| gptkbp:standardNumber |
1364-2001
|
| gptkbp:status |
superseded
|
| gptkbp:bfsParent |
gptkb:Verilog
|
| gptkbp:bfsLayer |
7
|
| https://www.w3.org/2000/01/rdf-schema#label |
IEEE 1364-2001
|