Fan-Out Wafer-Level Packaging (FOWLP)
GPTKB entity
Statements (49)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
semiconductor packaging technology
|
| gptkbp:abbreviation |
FOWLP
|
| gptkbp:alternativeTo |
wire bonding
flip chip packaging |
| gptkbp:commercialUse |
2009
|
| gptkbp:contrastsWith |
Fan-In Wafer-Level Packaging (FIWLP)
|
| gptkbp:developedBy |
semiconductor industry
|
| gptkbp:enables |
cost reduction
high-frequency operation high-density packaging smaller form factor improved signal integrity heterogeneous integration better electrical performance flexible design higher input/output density shorter interconnects 3D integration system-in-package (SiP) fine-pitch interconnects high-yield manufacturing lower thermal resistance multi-die integration reduced parasitics thinner packages wafer-level testability |
| gptkbp:firstCommercializedBy |
gptkb:Freescale_Semiconductor
|
| https://www.w3.org/2000/01/rdf-schema#label |
Fan-Out Wafer-Level Packaging (FOWLP)
|
| gptkbp:marketLeaders |
gptkb:ASE_Group
gptkb:Amkor_Technology gptkb:JCET gptkb:TSMC |
| gptkbp:step |
bump formation
die placement mold compound application reconstitution redistribution layer (RDL) formation wafer dicing |
| gptkbp:usedFor |
high-performance computing
mobile devices automotive electronics RF applications |
| gptkbp:usedIn |
integrated circuit packaging
|
| gptkbp:variant |
InFO (Integrated Fan-Out)
RDL-first FOWLP chip-first FOWLP eWLB (embedded Wafer-Level Ball Grid Array) |
| gptkbp:bfsParent |
gptkb:TSV_(Through-Silicon_Via)
|
| gptkbp:bfsLayer |
7
|