Tensilica Xtensa LX6

E426597

32-bit RISC core embedded processor core processor core

Tensilica Xtensa LX6 is a customizable 32-bit RISC processor core widely used in embedded systems for its efficient performance and low power consumption, notably in Espressif’s ESP32 SoCs.

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All labels observed (5)

Label	Occurrences
Xtensa	4
Cadence Tensilica Xtensa configurable processors	1
Tensilica Xtensa LX106	1
Tensilica Xtensa LX6 canonical	1
Xtensa ISA	1

How this entity was disambiguated

This entity first appeared as the object of triple T4276007 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.

NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07

Target entity: Tensilica Xtensa LX6
Context triple: [ESP32 microcontrollers, typicalCoreType, Tensilica Xtensa LX6]

A. QorIQ communications processors
QorIQ communications processors are a family of high-performance, power-efficient multicore system-on-chip devices designed for networking, telecommunications, and embedded communications applications.
B. Crusoe microprocessor
The Crusoe microprocessor is a low-power, x86-compatible CPU line from Transmeta that used code-morphing software to translate x86 instructions to an underlying VLIW architecture, targeting laptops and mobile devices.
C. Hitachi SH-4
The Hitachi SH-4 is a 32-bit RISC microprocessor known for its use in late-1990s gaming consoles and embedded systems, featuring strong floating-point performance for 3D graphics.
D. Motorola 68851
The Motorola 68851 is an external paged memory management unit (MMU) designed to work with Motorola 68020 processors, providing advanced virtual memory and protection features.
E. ARMv6 architecture family
The ARMv6 architecture family is a generation of 32-bit ARM processor designs that introduced significant enhancements in performance, multimedia processing, and security features for mobile and embedded devices.
F. None of above. chosen
G. Unsure - the case is ambiguous/there is not enough information to decide.

NED2 Entity disambiguation (via description) gpt-5-mini-2025-08-07

Target entity: Tensilica Xtensa LX6
Target entity description: Tensilica Xtensa LX6 is a customizable 32-bit RISC processor core widely used in embedded systems for its efficient performance and low power consumption, notably in Espressif’s ESP32 SoCs.

A. QorIQ communications processors
QorIQ communications processors are a family of high-performance, power-efficient multicore system-on-chip devices designed for networking, telecommunications, and embedded communications applications.
B. Crusoe microprocessor
The Crusoe microprocessor is a low-power, x86-compatible CPU line from Transmeta that used code-morphing software to translate x86 instructions to an underlying VLIW architecture, targeting laptops and mobile devices.
C. Hitachi SH-4
The Hitachi SH-4 is a 32-bit RISC microprocessor known for its use in late-1990s gaming consoles and embedded systems, featuring strong floating-point performance for 3D graphics.
D. Motorola 68851
The Motorola 68851 is an external paged memory management unit (MMU) designed to work with Motorola 68020 processors, providing advanced virtual memory and protection features.
E. ARMv6 architecture family
The ARMv6 architecture family is a generation of 32-bit ARM processor designs that introduced significant enhancements in performance, multimedia processing, and security features for mobile and embedded devices.
F. None of above. chosen

Statements (45)

Predicate	Object
instanceOf	32-bit RISC core ⓘ embedded processor core ⓘ processor core ⓘ
applicationDomain	Internet of Things ⓘ embedded systems ⓘ wireless communication SoCs ⓘ
architectureFamily	Xtensa ⓘ linked to: Tensilica Xtensa LX6
architectureType	RISC ⓘ
belongsToProductLine	Cadence Tensilica Xtensa configurable processors ⓘ linked to: Tensilica Xtensa LX6
bitWidth	32-bit ⓘ
configurability	supports configurable interfaces ⓘ supports configurable memory system ⓘ supports user-defined instructions ⓘ
coreCountInTypicalSoC	2 (in ESP32 dual-core variants) ⓘ
designedBy	Tensilica ⓘ
instructionSetArchitecture	Xtensa ISA ⓘ linked to: Tensilica Xtensa LX6
notableFor	configurability ⓘ high efficiency ⓘ low power consumption ⓘ
ownedBy	Cadence Design Systems ⓘ
powerEfficiency	optimized for low-power operation ⓘ
supports	DSP-oriented instructions ⓘ Harvard architecture ⓘ Xtensa RTOS ports ⓘ cache memory ⓘ configurable instruction set extensions ⓘ custom functional units ⓘ debug interface ⓘ hardware divider ⓘ hardware multiplier ⓘ interrupts ⓘ local memory (TCM) ⓘ power management features ⓘ
targetMarket	consumer electronics ⓘ industrial control ⓘ smart home devices ⓘ wearables ⓘ
usedIn	Espressif ESP32 ⓘ linked to: ESP32 microcontrollers Espressif ESP32-D0WD ⓘ linked to: ESP32 microcontrollers Espressif ESP32-D0WDQ6 ⓘ Espressif ESP32-PICO-D4 ⓘ linked to: Espressif ESP32-D0WDQ6 Espressif ESP32-S0WD ⓘ linked to: ESP32 microcontrollers Wi-Fi + Bluetooth combo SoCs ⓘ microcontroller-class SoCs ⓘ
usedWith	FreeRTOS (on ESP32) ⓘ linked to: FreeRTOS

How these facts were elicited