Thumb instruction set
E356356
The Thumb instruction set is a compact 16-bit subset of the ARM architecture designed to improve code density and efficiency on ARM-based processors.
All labels observed (2)
| Label | Occurrences |
|---|---|
| Thumb instruction set canonical | 3 |
| Thumb-2 instruction set | 2 |
How this entity was disambiguated
This entity first appeared as the object of triple T3426712 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: Thumb instruction set Context triple: [Acorn RISC Machine, supports, Thumb instruction set]
-
A.
MIPS
MIPS is a RISC (Reduced Instruction Set Computer) processor architecture widely used in embedded systems, networking equipment, and academic settings.
-
B.
MMIX
MMIX is a 64-bit RISC-style hypothetical computer architecture designed by Donald Knuth as the pedagogical machine for later volumes of *The Art of Computer Programming*.
-
C.
POWER instruction set architecture
The POWER instruction set architecture is a reduced instruction set computing (RISC) architecture originally developed by IBM for high-performance servers and workstations, forming the basis for later PowerPC and Power Architecture designs.
-
D.
SPARC microprocessor architecture
The SPARC microprocessor architecture is a RISC-based instruction set architecture widely used in high-performance and enterprise servers, originally created to power scalable, multi-processor systems.
-
E.
RISC architecture
RISC architecture is a CPU design philosophy that uses a small, highly optimized set of simple instructions to achieve high performance and efficiency.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: Thumb instruction set Target entity description: The Thumb instruction set is a compact 16-bit subset of the ARM architecture designed to improve code density and efficiency on ARM-based processors.
-
A.
MIPS
MIPS is a RISC (Reduced Instruction Set Computer) processor architecture widely used in embedded systems, networking equipment, and academic settings.
-
B.
MMIX
MMIX is a 64-bit RISC-style hypothetical computer architecture designed by Donald Knuth as the pedagogical machine for later volumes of *The Art of Computer Programming*.
-
C.
POWER instruction set architecture
The POWER instruction set architecture is a reduced instruction set computing (RISC) architecture originally developed by IBM for high-performance servers and workstations, forming the basis for later PowerPC and Power Architecture designs.
-
D.
SPARC microprocessor architecture
The SPARC microprocessor architecture is a RISC-based instruction set architecture widely used in high-performance and enterprise servers, originally created to power scalable, multi-processor systems.
-
E.
RISC architecture
RISC architecture is a CPU design philosophy that uses a small, highly optimized set of simple instructions to achieve high performance and efficiency.
- F. None of above. chosen
Statements (44)
| Predicate | Object |
|---|---|
| instanceOf |
instruction set architecture
ⓘ
reduced instruction set computing extension ⓘ |
| allows | mixed ARM and Thumb code in the same program ⓘ |
| alsoKnownAs |
ARM
ⓘ
surface form:
ARM Thumb state
|
| architectureFamily | ARM ⓘ |
| benefit |
potentially lower instruction cache miss rate
ⓘ
reduced memory footprint for firmware ⓘ smaller binaries compared to pure ARM code in many workloads ⓘ |
| bitWidth | 16-bit ⓘ |
| category | embedded processor technology ⓘ |
| coexistsWith | 32-bit ARM instruction set ⓘ |
| compatibleWith |
ARM Cortex-M series
ⓘ
surface form:
ARM Cortex-M family
ARM Cortex-R series ⓘ
surface form:
ARM Cortex-R family
ARM7TDMI ⓘ ARM9 ⓘ
surface form:
ARM9 family
some ARM Cortex-A cores ⓘ |
| designGoal |
improve code density
ⓘ
improve performance on memory-constrained systems ⓘ increase energy efficiency ⓘ reduce program memory usage ⓘ |
| encodingLength | 16-bit fixed-length instructions ⓘ |
| executionModel | decoded into full-width ARM operations internally on some cores ⓘ |
| executionStateOf | ARM architecture processor modes ⓘ |
| hasSuccessor |
Thumb instruction set
self-linksurface differs
ⓘ
surface form:
Thumb-2 instruction set
|
| influenced |
ARM Cortex-M series
ⓘ
surface form:
ARM Cortex-M ISA design
|
| introducedBy |
ARM
ⓘ
surface form:
ARM Holdings
|
| introducedFor | ARM-based processors ⓘ |
| optimizationFor |
narrow instruction fetch path
ⓘ
systems with limited instruction memory bandwidth ⓘ |
| partOf |
ARM
ⓘ
surface form:
ARM architecture
|
| requires | ARMv4T or later architecture support ⓘ |
| selectedBy | T-bit in CPSR on ARMv4T and later ⓘ |
| subsetOf |
ARM
ⓘ
surface form:
ARM instruction set
|
| supports |
arithmetic and logical instructions
ⓘ
conditional branch instructions ⓘ load and store instructions ⓘ |
| targetUseCase |
code-size-sensitive applications
ⓘ
embedded systems ⓘ microcontrollers ⓘ |
| tradeOff |
fewer available registers in many instructions compared to ARM state
ⓘ
reduced instruction encoding space for improved code density ⓘ |
| usedIn |
consumer electronics with ARM cores
ⓘ
industrial control systems based on ARM MCUs ⓘ microcontrollers running real-time operating systems ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
Instruction
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Input
Subject: Thumb instruction set Description of subject: The Thumb instruction set is a compact 16-bit subset of the ARM architecture designed to improve code density and efficiency on ARM-based processors.
Referenced by (5)
Full triples — surface form annotated when it differs from this entity's canonical label.
this entity surface form:
Thumb-2 instruction set
subject surface form:
ARMv7-A
this entity surface form:
Thumb-2 instruction set
subject surface form:
ARMv5