Statements (20)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:hardware_description_language
|
| gptkbp:category |
gptkb:electronic_design_automation
hardware design |
| gptkbp:developedBy |
gptkb:UC_Berkeley
|
| gptkbp:firstReleased |
2012
|
| gptkbp:format |
gptkb:Verilog
|
| gptkbp:latestReleaseVersion |
3.6.0
|
| gptkbp:license |
gptkb:Apache_License_2.0
|
| gptkbp:maintainedBy |
gptkb:CHIPS_Alliance
|
| gptkbp:openSource |
true
|
| gptkbp:repository |
https://github.com/chipsalliance/chisel3
|
| gptkbp:supports |
hardware generators
parameterized hardware |
| gptkbp:usedFor |
digital circuit design
|
| gptkbp:usedIn |
RISC-V processor design
|
| gptkbp:website |
https://www.chisel-lang.org/
|
| gptkbp:writtenBy |
gptkb:Scala
|
| gptkbp:bfsParent |
gptkb:CHIPS_Alliance
|
| gptkbp:bfsLayer |
7
|
| https://www.w3.org/2000/01/rdf-schema#label |
Chisel HDL
|