Statements (27)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
electronic design automation
|
| gptkbp:category |
electronic design automation
logic simulator |
| gptkbp:developedBy |
gptkb:Cadence_Design_Systems
|
| gptkbp:feature |
debugging tools
parallel simulation multi-core support mixed-language simulation UVM support coverage analysis integration with Cadence Verification Suite low power verification |
| https://www.w3.org/2000/01/rdf-schema#label |
Cadence Xcelium
|
| gptkbp:platform |
gptkb:Windows
gptkb:Linux |
| gptkbp:predecessor |
gptkb:Cadence_Incisive
|
| gptkbp:supportsLanguage |
gptkb:VHDL
gptkb:Verilog gptkb:SystemC gptkb:SystemVerilog e Language |
| gptkbp:usedFor |
digital simulation
functional verification mixed-signal simulation |
| gptkbp:website |
https://www.cadence.com/en_US/home/tools/system-design-and-verification/simulation-and-testbench-verification/xcelium-parallel-simulator.html
|
| gptkbp:bfsParent |
gptkb:Cadence_Incisive
|
| gptkbp:bfsLayer |
6
|