Statements (29)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:hardware_description_language
|
| gptkbp:abbreviation |
gptkb:BSV
|
| gptkbp:designedBy |
gptkb:Arvind
|
| gptkbp:developedBy |
gptkb:Bluespec,_Inc.
|
| gptkbp:extendsTo |
gptkb:SystemVerilog
|
| gptkbp:firstAppearance |
2003
|
| gptkbp:hasFeature |
term rewriting system
strong static typing guarded atomic actions parameterized modules synthesis to Verilog |
| gptkbp:influencedBy |
gptkb:Haskell
gptkb:SystemVerilog |
| gptkbp:license |
proprietary
open source (core compiler) |
| gptkbp:openSource |
partially
|
| gptkbp:paradigm |
functional programming
concurrent programming hardware description |
| gptkbp:usedFor |
ASIC design
FPGA design design of digital circuits hardware synthesis |
| gptkbp:website |
https://bluespec.com
|
| gptkbp:bfsParent |
gptkb:Lennart_Augustsson
gptkb:Verilog gptkb:Bluespec |
| gptkbp:bfsLayer |
7
|
| https://www.w3.org/2000/01/rdf-schema#label |
Bluespec SystemVerilog
|