Triple
T3244607
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | SPARC |
E68040
|
entity |
| Predicate | supports |
P516
|
FINISHED |
| Object | IEEE 754 floating-point |
E1460
|
NE FINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: IEEE 754 floating-point | Statement: [SPARC, supports, IEEE 754 floating-point]
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: IEEE 754 floating-point Context triple: [SPARC, supports, IEEE 754 floating-point]
-
A.
IEEE 754 floating‑point arithmetic standard
chosen
The IEEE 754 floating‑point arithmetic standard is the globally adopted specification that defines formats and rules for representing and performing binary and decimal floating‑point calculations in computer systems.
-
B.
Float
"Float" is a studio album by American rapper Styles P that showcases his gritty lyricism over atmospheric, hard-hitting production.
-
C.
VFP floating-point extension
The VFP floating-point extension is an ARM architecture coprocessor feature that provides hardware support for high-performance single- and double-precision floating-point arithmetic.
-
D.
F32
F32 is BMW’s internal model code for the first-generation 4 Series coupe, introduced as a sporty, premium compact executive car.
-
E.
CP1 floating-point coprocessor
The CP1 floating-point coprocessor is a dedicated hardware unit used in MIPS architectures to perform floating-point arithmetic operations efficiently.
- F. None of above.
- G. Unsure - the case is ambiguous/there is not enough information to decide.
Provenance (3 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69ad858e4c708190aa31d486cfee8a6a |
completed | March 8, 2026, 2:19 p.m. |
| NER | Named-entity recognition | batch_69adaf1982448190b3d60c9e4471421f |
completed | March 8, 2026, 5:17 p.m. |
| NED1 | Entity disambiguation (via context triple) | batch_69b2775be7c88190ba60b191f1c51e19 |
completed | March 12, 2026, 8:20 a.m. |
Created at: March 8, 2026, 3:08 p.m.