Statements (32)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
computer bus specification
|
| gptkbp:competitor |
gptkb:AMBA
gptkb:AXI gptkb:OCP Avalon bus |
| gptkbp:developedBy |
gptkb:OpenCores_community
|
| gptkbp:documentation |
opencores.org
|
| gptkbp:firstReleased |
2001
|
| gptkbp:focusesOn |
simplicity
reusability portability |
| gptkbp:hasVersion |
B4 (latest as of 2024)
|
| https://www.w3.org/2000/01/rdf-schema#label |
Wishbone Specification
|
| gptkbp:isOpenStandard |
true
|
| gptkbp:license |
open source
|
| gptkbp:specifies |
timing diagrams
optional features bus cycles signal names |
| gptkbp:supports |
master-slave architecture
point-to-point interconnect crossbar interconnect shared bus interconnect address bus widths from 1 to 64 bits data bus widths from 8 to 64 bits interconnection of IP cores |
| gptkbp:usedBy |
many FPGA projects
open-source CPU cores |
| gptkbp:usedIn |
gptkb:software
SoC design |
| gptkbp:bfsParent |
gptkb:Wishbone_bus
|
| gptkbp:bfsLayer |
7
|