Statements (25)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:microprocessor
|
| gptkbp:announced |
2018
|
| gptkbp:architecture |
gptkb:RISC-V
|
| gptkbp:availableOn |
gptkb:GitHub
|
| gptkbp:core_family |
gptkb:SweRV
|
| gptkbp:core_variant |
gptkb:EH1
gptkb:EL2 EH2 |
| https://www.w3.org/2000/01/rdf-schema#label |
Western Digital SweRV Core
|
| gptkbp:intendedUse |
embedded systems
|
| gptkbp:license |
gptkb:Apache_License_2.0
|
| gptkbp:manufacturer |
gptkb:Western_Digital
|
| gptkbp:notableFeature |
open hardware design
RV32IMC instruction set dual-issue pipeline high performance for embedded applications |
| gptkbp:openSource |
yes
|
| gptkbp:pipeline_stages |
9
|
| gptkbp:targetMarket |
IoT devices
storage devices industrial applications |
| gptkbp:used_in |
gptkb:Western_Digital_storage_controllers
|
| gptkbp:width |
32-bit
|
| gptkbp:bfsParent |
gptkb:RISC-V_architecture
|
| gptkbp:bfsLayer |
6
|