Statements (26)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
FPGA
|
| gptkbp:blockRAM |
75.9 Mb
|
| gptkbp:CLBs |
118224
|
| gptkbp:DSP_slices |
6840
|
| gptkbp:family |
gptkb:Virtex_UltraScale+
|
| https://www.w3.org/2000/01/rdf-schema#label |
Virtex UltraScale+ VU9P
|
| gptkbp:intendedUse |
gptkb:signal_processing
high-performance computing networking data center acceleration |
| gptkbp:logicCells |
2580000
|
| gptkbp:manufacturer |
gptkb:Xilinx
|
| gptkbp:memoryBusWidth |
4.78 Tbps
|
| gptkbp:packageOptions |
FFVC1517
FFVE1924 |
| gptkbp:part_of |
XCVU9P
|
| gptkbp:pinCount |
832
|
| gptkbp:releaseYear |
2016
|
| gptkbp:speed |
~800 MHz
|
| gptkbp:supports |
gptkb:PCIe_Gen3_x16
gptkb:High_Bandwidth_Memory_(HBM) DDR4 memory interfaces |
| gptkbp:technology |
16nm FinFET
|
| gptkbp:transceivers |
120
|
| gptkbp:bfsParent |
gptkb:Xilinx_UltraScale+_FPGAs
|
| gptkbp:bfsLayer |
7
|