Very Long Instruction Word (VLIW)
GPTKB entity
Statements (33)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:architecture
|
| gptkbp:abbreviation |
gptkb:VLIW
|
| gptkbp:advantage |
code size increase
simpler hardware binary compatibility issues |
| gptkbp:characterizedBy |
multiple operations encoded in a single instruction word
|
| gptkbp:compatibleWith |
complex hardware scheduling
|
| gptkbp:compilerRole |
resolves instruction dependencies
schedules parallel operations |
| gptkbp:contrastsWith |
superscalar architecture
|
| gptkbp:dependsOn |
compiler to schedule instructions
|
| gptkbp:designedFor |
parallel instruction execution
|
| gptkbp:example |
gptkb:Intel_Itanium
gptkb:Transmeta_Crusoe Elbrus 2000 Texas Instruments TMS320C6x |
| gptkbp:focusesOn |
instruction-level parallelism
|
| gptkbp:hardwareRole |
executes scheduled instructions
|
| https://www.w3.org/2000/01/rdf-schema#label |
Very Long Instruction Word (VLIW)
|
| gptkbp:proposedBy |
gptkb:Josh_Fisher
1983 |
| gptkbp:relatedTo |
gptkb:RISC
gptkb:SIMD gptkb:EPIC_architecture superscalar processor |
| gptkbp:usedBy |
Analog Devices TigerSHARC
Hewlett-Packard PA-RISC 2.0 |
| gptkbp:usedIn |
embedded systems
microprocessors digital signal processors graphics processing units (GPUs) |
| gptkbp:bfsParent |
gptkb:Explicitly_Parallel_Instruction_Computing_(EPIC)
|
| gptkbp:bfsLayer |
7
|