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gptkbp:instanceOf
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patent
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|
gptkbp:abstract
|
A method for controlling a semiconductor memory device to improve performance.
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gptkbp:applicationNumber
|
10/682,555
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gptkbp:applicationPublication
|
gptkb:US_2003/0123456_A1
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gptkbp:applicationStatus
|
granted
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|
gptkbp:applicationType
|
non-provisional
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gptkbp:assignee
|
gptkb:Toshiba_Corporation
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gptkbp:citedBy
|
gptkb:US_7,123,456_B2
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gptkbp:country
|
gptkb:United_States
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gptkbp:effectiveDate
|
September 7, 2004
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gptkbp:examiner
|
gptkb:John_Doe
|
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gptkbp:fieldOfInvention
|
semiconductor technology
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|
gptkbp:filingDate
|
March 29, 2002
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|
gptkbp:grantDate
|
September 7, 2004
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|
https://www.w3.org/2000/01/rdf-schema#label
|
US 6,787,555 T20
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gptkbp:internationalClassification
|
G11C 7/00
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gptkbp:inventor
|
Jane_Smith
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gptkbp:legalStatus
|
active
|
|
gptkbp:location
|
gptkb:United_States
|
|
gptkbp:maintenanceFee
|
paid
|
|
gptkbp:numberOfClaims
|
20
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|
gptkbp:patentCitation
|
gptkb:US_5,123,456_A
|
|
gptkbp:patentClassification
|
semiconductor memory control
|
|
gptkbp:patentExpiration
|
2024-09-07
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gptkbp:patentFamily
|
Toshiba_semiconductor_patents
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gptkbp:patentLink
|
https://patents.google.com/patent/US6787555B2
|
|
gptkbp:patentNumber
|
6,787,555
|
|
gptkbp:patentOwner
|
gptkb:Toshiba_Corporation
|
|
gptkbp:patentType
|
utility
|
|
gptkbp:priorityDate
|
March 29, 2001
|
|
gptkbp:relatedPatent
|
gptkb:US_6,123,456_B1
|
|
gptkbp:status
|
active
|
|
gptkbp:technologyDomain
|
memory devices
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gptkbp:title
|
Method and apparatus for controlling a semiconductor memory device
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