Statements (18)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:microprocessor
|
| gptkbp:architecture |
gptkb:RISC-V
|
| gptkbp:cache |
optional instruction cache
|
| gptkbp:canBe |
yes
|
| gptkbp:core_family |
gptkb:E_Coreplex_Series
|
| gptkbp:intendedUse |
embedded systems
|
| gptkbp:manufacturer |
gptkb:SiFive
|
| gptkbp:pipeline_stages |
2-stage
|
| gptkbp:releaseYear |
2017
|
| gptkbp:supports |
gptkb:AXI4_interface
gptkb:RV32IMC APB interface |
| gptkbp:targetMarket |
gptkb:microprocessor
gptkb:IoT |
| gptkbp:width |
32-bit
|
| gptkbp:bfsParent |
gptkb:E21_core
|
| gptkbp:bfsLayer |
7
|
| https://www.w3.org/2000/01/rdf-schema#label |
SiFive E21 Coreplex
|