Statements (28)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:microprocessor
|
| gptkbp:architecture |
gptkb:Power_ISA_v2.06
|
| gptkbp:designedBy |
gptkb:Freescale_Semiconductor
|
| gptkbp:endianSupport |
bi-endian
|
| gptkbp:fabricationProcess |
45 nm SOI
|
| gptkbp:floatingPointUnit |
dual precision
|
| gptkbp:instructionSet |
gptkb:PowerPC
|
| gptkbp:introducedIn |
2010
|
| gptkbp:L2Cache |
up to 512 KB
32 KB instruction, 32 KB data optional, up to 2 MB |
| gptkbp:market |
embedded systems
|
| gptkbp:outOfOrderExecution |
no
|
| gptkbp:pipelineStages |
7
|
| gptkbp:predecessor |
PowerPC e500mc
|
| gptkbp:speed |
up to 2.5 GHz
|
| gptkbp:successor |
gptkb:PowerPC_e6500_core
|
| gptkbp:superscalar |
yes
|
| gptkbp:supports |
gptkb:AltiVec
gptkb:Symmetric_Multiprocessing_(SMP) hardware virtualization hypervisor mode |
| gptkbp:usedIn |
QorIQ P5 series
QorIQ T5 series |
| gptkbp:width |
64-bit
|
| gptkbp:bfsParent |
gptkb:AltiVec_SIMD_unit
|
| gptkbp:bfsLayer |
8
|
| https://www.w3.org/2000/01/rdf-schema#label |
PowerPC e5500 core
|