|
gptkbp:instance_of
|
gptkb:microprocessor
|
|
gptkbp:bfsLayer
|
4
|
|
gptkbp:bfsParent
|
gptkb:MIPS_Processors
|
|
gptkbp:application
|
high-performance computing
|
|
gptkbp:architectural_style
|
gptkb:architect
|
|
gptkbp:cache_size
|
up to 1 MB
split instruction and data cache
|
|
gptkbp:connects
|
MIPS bus architecture
|
|
gptkbp:data_bus_width
|
64 bits
|
|
gptkbp:design
|
high performance and efficiency
load/store architecture
|
|
gptkbp:designed_by
|
gptkb:MIPS_Computer_Systems
|
|
gptkbp:developer
|
available for software development
late 1980s to early 1990s
|
|
gptkbp:economic_impact
|
significant in the 1990s
|
|
gptkbp:end_of_life
|
gptkb:1997
|
|
gptkbp:engine
|
over 1 million
|
|
gptkbp:features
|
superscalar architecture
|
|
gptkbp:form_factor
|
single-chip solution
|
|
gptkbp:historical_impact
|
influenced RISC design trends.
|
|
https://www.w3.org/2000/01/rdf-schema#label
|
MIPS R6000
|
|
gptkbp:involved_units
|
integrated FPU
|
|
gptkbp:is_compatible_with
|
backward compatible with MIPSI
various UNIX-like operating systems
|
|
gptkbp:language_of_instruction
|
MIPS instruction set
RISC
out-of-order execution
5-stage pipeline
|
|
gptkbp:legacy
|
influenced later MIPS processors
|
|
gptkbp:manufacturer
|
gptkb:Silicon_Graphics,_Inc.
|
|
gptkbp:market
|
gptkb:1991
workstation market
|
|
gptkbp:market_segment
|
embedded systems
|
|
gptkbp:notable_users
|
gptkb:Silicon_Graphics_workstations
|
|
gptkbp:performance
|
gptkb:SPEC_benchmarks
high performance for its time
|
|
gptkbp:power_consumption
|
approximately 15 W
|
|
gptkbp:predecessor
|
gptkb:MIPS_R5000
|
|
gptkbp:ram
|
virtual memory support
up to 4 GB of RAM
|
|
gptkbp:released_in
|
gptkb:1991
|
|
gptkbp:size
|
approximately 250 mm²
|
|
gptkbp:speed
|
up to 100 M Hz
|
|
gptkbp:successor
|
gptkb:MIPS_R4000
MIPSIV
|
|
gptkbp:supports
|
floating-point operations
hardware debugging features
various compilers available
|
|
gptkbp:technology
|
CMOS
|
|
gptkbp:used_in
|
workstations
|