Statements (47)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:microprocessor
|
| gptkbp:application |
digital signal processing
embedded systems networking equipment |
| gptkbp:architect |
gptkb:MIPS_architecture
|
| gptkbp:busConnections |
MIPS I/O bus
|
| gptkbp:compatibleWith |
backward compatible with MIPS R3000
|
| gptkbp:dataBusWidth |
64 bits
|
| gptkbp:death |
approximately 200 mm²
|
| gptkbp:designedBy |
gptkb:MIPS_Computer_Systems
|
| gptkbp:developer |
compilers
debuggers MIPS_simulators |
| gptkbp:formFactor |
single-chip
|
| https://www.w3.org/2000/01/rdf-schema#label |
MIPS R380000
|
| gptkbp:instructionSet |
5-stage pipeline
MIPS_instruction_set |
| gptkbp:marketSegment |
telecommunications
consumer electronics high-performance computing |
| gptkbp:notableEvent |
hardware debugging features
|
| gptkbp:notableUsers |
gptkb:Nintendo
gptkb:Silicon_Graphics gptkb:Cisco_Systems gptkb:Sony |
| gptkbp:operatingHours |
gptkb:BSD
Linux Unix-like operating systems |
| gptkbp:powers |
varies with clock speed
|
| gptkbp:predecessor |
MIPS R3000
|
| gptkbp:producedBy |
various semiconductor companies
|
| gptkbp:RAM |
gptkb:SDRAM
gptkb:EDO_DRAM L1 cache L2 cache up to 4 GB |
| gptkbp:releasedIn |
1991
|
| gptkbp:speed |
up to 200 MHz
|
| gptkbp:successor |
MIPS R4000
|
| gptkbp:supports |
virtual memory
cache coherency floating-point operations multimedia instructions |
| gptkbp:technology |
gptkb:CMOS
|
| gptkbp:transmission |
over 1 million
|
| gptkbp:usedIn |
servers
workstations |