Statements (20)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:electronic_design_automation
|
| gptkbp:developedBy |
gptkb:Actel
gptkb:Microchip_Technology |
| gptkbp:license |
Proprietary
|
| gptkbp:platform |
gptkb:Windows
gptkb:Linux gptkb:IGLOO gptkb:ProASIC3 gptkb:RTG4 gptkb:SmartFusion gptkb:PolarFire |
| gptkbp:usedFor |
FPGA Design
|
| gptkbp:uses |
gptkb:simulation
Synthesis Place and Route Timing Analysis |
| gptkbp:website |
https://www.microchip.com/en-us/tools-resources/design-resources/fpga-and-soc-design-tools/libero-soc
|
| gptkbp:bfsParent |
gptkb:ModelSim
|
| gptkbp:bfsLayer |
7
|
| https://www.w3.org/2000/01/rdf-schema#label |
Libero SoC
|