Statements (23)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:CPU_cache
|
| gptkbp:accessSpeed |
faster than L2 cache
|
| gptkbp:foundIn |
ARM CPUs
x86 CPUs PowerPC CPUs |
| gptkbp:fullName |
Level 1 Instruction Cache
|
| gptkbp:function |
stores instructions for quick access by CPU
|
| gptkbp:hasHierarchy |
first level cache
|
| https://www.w3.org/2000/01/rdf-schema#label |
L1 I-cache
|
| gptkbp:latency |
1-4 CPU cycles
|
| gptkbp:level |
gptkb:L1
|
| gptkbp:location |
on CPU chip
|
| gptkbp:notSharedWith |
other CPU cores
|
| gptkbp:numberOfLocations |
CPU instructions
|
| gptkbp:purpose |
reduce instruction fetch latency
|
| gptkbp:separates |
gptkb:L1_D-cache
|
| gptkbp:sharedBy |
one CPU core
|
| gptkbp:size |
typically 16KB to 64KB
|
| gptkbp:technology |
SRAM
|
| gptkbp:type |
instruction cache
|
| gptkbp:usedBy |
modern processors
|
| gptkbp:bfsParent |
gptkb:C906_RISC-V
|
| gptkbp:bfsLayer |
8
|