gptkbp:instance_of
|
gptkb:microprocessor
|
gptkbp:bfsLayer
|
5
|
gptkbp:bfsParent
|
gptkb:Nehalem_EX_processors
|
gptkbp:architectural_style
|
x86-64
64-bit
|
gptkbp:cache_size
|
L3 cache
up to 30 MB
3 levels of cache
|
gptkbp:code
|
gptkb:Ivy_Bridge
|
gptkbp:cooling_system
|
gptkb:Intel_Thermal_Solution
|
gptkbp:developed_by
|
gptkb:Intel
|
gptkbp:events
|
gptkb:Intel_Developer_Forum_2012
|
gptkbp:features
|
Integrated graphics
Improved power efficiency
|
gptkbp:form_factor
|
Multi-chip module
|
gptkbp:fuel_capacity
|
Improved over previous generation
|
gptkbp:gpu
|
gptkb:3.0
|
gptkbp:graphics
|
gptkb:Intel_HD_Graphics_4000
|
https://www.w3.org/2000/01/rdf-schema#label
|
Ivy Bridge EP
|
gptkbp:hyper_threading
|
gptkb:battle
|
gptkbp:is_compatible_with
|
gptkb:Intel_C602_chipset
|
gptkbp:language_of_instruction
|
x86-64
AVX, AV X2
|
gptkbp:launch_date
|
gptkb:2012
|
gptkbp:launch_site
|
gptkb:San_Francisco
|
gptkbp:market
|
varied by model
Q2 2012
|
gptkbp:market_segment
|
gptkb:server
|
gptkbp:marketed_as
|
Data centers
Intel Xeon E5-2600 series
|
gptkbp:number_of_cores
|
up to 12
|
gptkbp:overclocking_support
|
gptkb:Limited
|
gptkbp:performance
|
Improved over previous generation
20% over Sandy Bridge
SPECCPU 2006
|
gptkbp:power_consumption
|
gptkb:Intel_Speed_Step_Technology
Reduced compared to Sandy Bridge
|
gptkbp:predecessor
|
Sandy Bridge EP
|
gptkbp:processor
|
gptkb:Intel_Xeon
x86-64
E5-2600 series
|
gptkbp:produced_by
|
22 nm
|
gptkbp:ram
|
up to 68.3 GB/s
up to 768 GB
DD R3/ L/-RS 1333/1600/1866
up to 1866 M Hz
|
gptkbp:release_date
|
gptkb:2012
|
gptkbp:released
|
Enhanced performance and efficiency
March 2012
|
gptkbp:security_features
|
gptkb:Intel_TXT
|
gptkbp:sister_channel
|
gptkb:4
|
gptkbp:socket_type
|
LGA 1356
|
gptkbp:successor
|
Haswell EP
|
gptkbp:supports
|
DD R3 memory
|
gptkbp:target_market
|
gptkb:High_School
|
gptkbp:thermal_design_power
|
up to 95 W
|
gptkbp:uses
|
3 D Tri-Gate transistors
|
gptkbp:virtualization_support
|
gptkb:battle
|