Statements (23)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:microprocessor
|
| gptkbp:coreCount |
1
|
| gptkbp:family |
gptkb:Celeron
|
| gptkbp:instructionSet |
x86
|
| gptkbp:L2Cache |
128 KB
|
| gptkbp:L2CacheType |
on-die, full-speed
|
| gptkbp:manufacturer |
gptkb:Intel
|
| gptkbp:market |
desktop
|
| gptkbp:microarchitecture |
P6
|
| gptkbp:notableFeature |
first Celeron with on-die L2 cache
|
| gptkbp:predecessor |
Intel Celeron Covington
|
| gptkbp:processNode |
250 nm
|
| gptkbp:releaseDate |
August 1998
|
| gptkbp:socket |
Slot 1
|
| gptkbp:speed |
400 MHz
300 MHz 333 MHz 366 MHz |
| gptkbp:successor |
Intel Celeron Coppermine
|
| gptkbp:supportsMMX |
yes
|
| gptkbp:bfsParent |
gptkb:Socket_370_CPUs
|
| gptkbp:bfsLayer |
7
|
| https://www.w3.org/2000/01/rdf-schema#label |
Intel Celeron Mendocino
|