|
gptkbp:instanceOf
|
gptkb:standard
|
|
gptkbp:appliesTo
|
ASIC design
FPGA design
digital circuit modeling
|
|
gptkbp:category
|
gptkb:hardware_description_language
gptkb:electronic_design_automation
|
|
gptkbp:contains
|
definition of 9-valued logic system
|
|
gptkbp:defines
|
std_logic
standard logic types for VHDL
std_logic_vector
|
|
gptkbp:documentType
|
1164
|
|
gptkbp:fullName
|
gptkb:IEEE_Standard_VHDL_Language_Reference_Manual
|
|
gptkbp:language
|
English
|
|
gptkbp:logicValues
|
0
1
H
L
W
U
X
Z
-
|
|
gptkbp:publicationYear
|
1993
|
|
gptkbp:publishedBy
|
gptkb:IEEE_Standards_Association
gptkb:Institute_of_Electrical_and_Electronics_Engineers
|
|
gptkbp:replacedBy
|
no previous standard for VHDL logic types
|
|
gptkbp:standardNumber
|
IEEE Std 1164-1993
|
|
gptkbp:status
|
active
|
|
gptkbp:usedFor
|
digital logic simulation
|
|
gptkbp:usedIn
|
gptkb:VHDL
|
|
gptkbp:website
|
https://standards.ieee.org/ieee/1164/1797/
|
|
gptkbp:bfsParent
|
gptkb:IEEE_1076_VHDL_standard
gptkb:IEEE_1076_series
gptkb:IEEE_1164_standard
gptkb:IEEE_Standard_for_VHDL_Language_Reference_Manual
|
|
gptkbp:bfsLayer
|
8
|
|
https://www.w3.org/2000/01/rdf-schema#label
|
IEEE 1164
|