Statements (18)
| Predicate | Object |
|---|---|
| gptkbp:instanceOf |
gptkb:International_Standard
|
| gptkbp:appliesTo |
digital logic design
|
| gptkbp:category |
electronic design automation
|
| gptkbp:defines |
VHDL synthesis packages
|
| gptkbp:firstPublished |
1996
|
| gptkbp:fullName |
IEEE Standard VHDL Synthesis Packages
|
| gptkbp:hasVersion |
IEEE 1076.3-1997
IEEE 1076.3-2002 |
| https://www.w3.org/2000/01/rdf-schema#label |
IEEE 1076.3
|
| gptkbp:partOf |
gptkb:IEEE_1076_family
|
| gptkbp:publishedBy |
gptkb:Institute_of_Electrical_and_Electronics_Engineers
|
| gptkbp:relatedTo |
gptkb:VHDL
hardware description language |
| gptkbp:standardNumber |
1076.3
|
| gptkbp:status |
active
|
| gptkbp:usedFor |
synthesis of VHDL code
|
| gptkbp:bfsParent |
gptkb:IEEE_1076_series
|
| gptkbp:bfsLayer |
7
|