ARM big.LITTLE heterogeneous computing
E925257
ARM big.LITTLE heterogeneous computing is a processor architecture that combines high-performance cores with power-efficient cores in a single system-on-chip to optimize both speed and energy consumption.
All labels observed (1)
| Label | Occurrences |
|---|---|
| ARM big.LITTLE heterogeneous computing canonical | 1 |
How this entity was disambiguated
This entity first appeared as the object of triple T11409206 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: ARM big.LITTLE heterogeneous computing Context triple: [Sawtooth, supportsFeature, ARM big.LITTLE heterogeneous computing]
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A.
Independent Computing Architecture
Independent Computing Architecture (ICA) is Citrix's proprietary protocol for delivering virtual applications and desktops over a network, enabling remote access to centralized computing resources.
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B.
Xe-HPG microarchitecture
Xe-HPG microarchitecture is Intel’s high-performance gaming-oriented GPU architecture designed to power its discrete Arc graphics cards with advanced features like hardware-accelerated ray tracing.
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C.
Tensor Processing Unit
A Tensor Processing Unit (TPU) is a specialized AI accelerator chip designed by Google to efficiently perform large-scale machine learning computations, particularly for neural networks.
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D.
J-Core architecture
J-Core architecture is an open-source, FPGA-oriented implementation of the SuperH-compatible CPU design used in embedded systems and hobbyist hardware projects.
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E.
ARM Neoverse
ARM Neoverse is a family of 64-bit ARM-based processor platforms designed primarily for high-performance cloud, data center, and infrastructure workloads.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: ARM big.LITTLE heterogeneous computing Target entity description: ARM big.LITTLE heterogeneous computing is a processor architecture that combines high-performance cores with power-efficient cores in a single system-on-chip to optimize both speed and energy consumption.
-
A.
Independent Computing Architecture
Independent Computing Architecture (ICA) is Citrix's proprietary protocol for delivering virtual applications and desktops over a network, enabling remote access to centralized computing resources.
-
B.
Xe-HPG microarchitecture
Xe-HPG microarchitecture is Intel’s high-performance gaming-oriented GPU architecture designed to power its discrete Arc graphics cards with advanced features like hardware-accelerated ray tracing.
-
C.
Tensor Processing Unit
A Tensor Processing Unit (TPU) is a specialized AI accelerator chip designed by Google to efficiently perform large-scale machine learning computations, particularly for neural networks.
-
D.
J-Core architecture
J-Core architecture is an open-source, FPGA-oriented implementation of the SuperH-compatible CPU design used in embedded systems and hobbyist hardware projects.
-
E.
ARM Neoverse
ARM Neoverse is a family of 64-bit ARM-based processor platforms designed primarily for high-performance cloud, data center, and infrastructure workloads.
- F. None of above. chosen
Statements (50)
| Predicate | Object |
|---|---|
| instanceOf |
ARM processor technology
ⓘ
heterogeneous multi-core processor architecture ⓘ |
| abbreviation | big.LITTLE NERFINISHED ⓘ |
| aimsTo | optimize performance and energy efficiency ⓘ |
| announcedBy | Arm Limited NERFINISHED ⓘ |
| appliesTo | system-on-chip designs ⓘ |
| basedOn |
ARMv7-A architecture
NERFINISHED
ⓘ
ARMv8-A architecture NERFINISHED ⓘ |
| contrastsWith | homogeneous multi-core architectures ⓘ |
| developer | Arm Limited NERFINISHED ⓘ |
| enables | heterogeneous CPU clusters ⓘ |
| hasComponent |
high-performance CPU cores
ⓘ
power-efficient CPU cores ⓘ |
| hasDesignGoal |
enable fine-grained power management
ⓘ
extend battery life in mobile devices ⓘ provide high performance under heavy workloads ⓘ reduce power consumption under light workloads ⓘ |
| hasFeature |
asymmetric multi-processing
ⓘ
dynamic switching between big and LITTLE cores ⓘ per-core power gating ⓘ |
| influenced | ARM DynamIQ technology NERFINISHED ⓘ |
| introducedIn | 2011 ⓘ |
| marketedAs | power-efficient performance solution ⓘ |
| optimizedFor | mobile computing workloads ⓘ |
| requires | operating system scheduler support ⓘ |
| supports |
CPU hotplug techniques
ⓘ
Heterogeneous Multi-Processing ⓘ cluster migration ⓘ global task scheduling ⓘ task migration between cores ⓘ |
| usedBy |
HiSilicon Kirin SoCs
NERFINISHED
ⓘ
MediaTek SoCs NERFINISHED ⓘ Qualcomm Snapdragon SoCs with similar heterogeneous designs ⓘ Samsung Exynos SoCs NERFINISHED ⓘ |
| usedIn |
automotive systems
ⓘ
embedded systems ⓘ single-board computers ⓘ smartphones ⓘ tablets ⓘ wearable devices ⓘ |
| uses | ARM Cortex-A series cores NERFINISHED ⓘ |
| usesCoreType |
ARM Cortex-A15
NERFINISHED
ⓘ
ARM Cortex-A53 NERFINISHED ⓘ ARM Cortex-A55 NERFINISHED ⓘ ARM Cortex-A57 NERFINISHED ⓘ ARM Cortex-A7 NERFINISHED ⓘ ARM Cortex-A72 NERFINISHED ⓘ ARM Cortex-A73 NERFINISHED ⓘ ARM Cortex-A75 NERFINISHED ⓘ ARM Cortex-A76 NERFINISHED ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
Instruction
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Input
Subject: ARM big.LITTLE heterogeneous computing Description of subject: ARM big.LITTLE heterogeneous computing is a processor architecture that combines high-performance cores with power-efficient cores in a single system-on-chip to optimize both speed and energy consumption.
Referenced by (1)
Full triples — surface form annotated when it differs from this entity's canonical label.