Yices

E904160

Yices is a high-performance Satisfiability Modulo Theories (SMT) solver widely used in formal verification and automated reasoning.

All labels observed (4)

Label Occurrences
Yices canonical 1
Yices (proper name used by SRI International) 1
Yices 1 1

How this entity was disambiguated

Statements (44)

Predicate Object
instanceOf SMT solver
decision procedure
formal verification tool
software tool
conformsTo SMT-LIB standard
hasDeveloper SRI International
SRI International Computer Science Laboratory
hasHomepage https://yices.csl.sri.com/
hasLicense proprietary with free academic use
hasProperty high-performance
industrial-strength
supports multiple background theories
hasVersion Yices 1
linked to: Yices

Yices 2
linked to: Yices
isDesignedFor automated reasoning
formal verification
hardware verification
model checking
software verification
isNamedAfter Yices (proper name used by SRI International)
linked to: Yices
isUsedIn formal methods research
industrial verification workflows
isWrittenInLanguage C
participatesIn SMT-COMP
runsOn Linux
Windows
macOS
supportsFeature incremental solving
model generation
optimization for some theories
push-pop interface
unsat core extraction
supportsInterface C API
C++ API
Python bindings
SMT-LIB format
command-line interface
supportsLogic Satisfiability Modulo Theories
arrays
bit-vectors
combinations of theories
equality with uninterpreted functions
quantifier-free linear arithmetic
uninterpreted functions

How these facts were elicited

Referenced by (4)

Full triples — surface form annotated when it differs from this entity's canonical label.

Satisfiability Modulo Theories hasSolver Yices
Yices hasVersion Yices 1
linked to: Yices
Yices hasVersion Yices 2
linked to: Yices
Yices isNamedAfter Yices (proper name used by SRI International)
linked to: Yices